MEEPS DISPLAY

Rev. B (with minor layout change for ECPE5)

J. Dunmire
February 27, 2004

Reference Documents:

Requirements
Schematic
Layout (Rev A): Actual Size , Top , Bottom , Traces Only .
Layout (ECPE5): Actual Size , Top , Bottom , Traces Only .
Signal List
Parts List

Introduction

MEEPS has four (4) sections:

Detailed descriptions of each section can be view by clicking on the associated link above.

The Display and Basic I/O (DISPLAY) section is one of the daughter boards of the Modular Embedded Experimenter's PIC System (MEEPS).

The remainder of this document describes the subsections of the DISPLAY, configuration options, and variations from the requirements.

Circuit Description

The DISPLAY includes active and passive I/O devices, a dot matrix display, and a digital I/O expansion connector.

Connectors

There are four (4) connectors on the DISPLAY:

J201 is a 40 pin connector designed to mate with the expansion connector on the CPU. The signals match those on the CPU and are also documented in Signal List file.
J202 is a three pin connector for the 1-Wire bus. The signals on this connector are:
1. Vcc
2. 1-Wire I/O
3. GND
J203 is the analog output connector for the DAC. The signals are arranged as follows:
1. GND
2. OUTA - Analog, 0-Vcc
3. GND
4. OUTB - Analog, 0-Vcc
5. GND
J204 is an 8-bit digital I/O port with power and ground pins. The signals are:
1. RC0
2. RC1
3. RC2
4. RC3 - Warning: This signal is also used for the serial clock to the DAC, U204.
5. RC4
6. RC5 - Warning: This signal is also used for serial data to the DAC, U204.
7. RC6
8. RC7
9. GND
10. Vcc

Dot Matrix Display

The dot matix display consists of two 5x7 LED modules, U201 and U202. The rows are driven from the low seven bits of port D. The columns are driven by the low 5 bits of ports A and B. The current limiting resistors are in the row lines, so the matrix should be scanned a column at a time to avoid display intensity difference that could result if more than one LED on each row is on at a time.

To turn a LED in the matrix on, The column line should be pulled low and the row line should be driven high. Note: This is opposite of the drive used on the ECPE5 board. The dot matix modules used for the ECPE5 board can not be usd for this board. While at first glance it might appear that the ECPE5 dot matrix modules could be used on this board by simply inverting the drive. However, RA4 is an open-drain output and therefore can not source current. An alternate design might have might have swapped RA4 with RB5 which is the 1-Wire bus for U206. But that would have made a mess of the dot matrix scanning logic.

Passive Devices

There are three passive sensors on the DISPLAY: S201, S202, and R201. The two switches are connected to bits RE1 and RE2. When the switches are pressed, the input signal will be low (0).

RE0 is connected to the potentiometer R201 through the series resistor R202h. RE0 can be configured as an analog input channel and used to measure the voltage at the wiper of R201.

Active Devices

1-Wire Devices

There are three (3) 1-Wire devices on this board. U206 is the DS821 thermostat that was used in the ECPE5 project. While U206 is a 1-Wire device, it is not suitable for use on a 1-Wire bus because it does not include the required addressing protocol.

U203 and U205 can be any 1-Wire devices that are compatible with a 1-Wire bus and is available in a TO-92 package. J202 is also available to make it easy to extend the 1-Wire bus off board.

Signals RA5 and RB5, used for 1-Wire signals, are not open-drain devices. To obtain the open-drain operation required for a 1-Wire bus, the port configuration bits for RA5 and RB5 (TRISA0 and TRISB0 respectively) should be used to swith the signals from outputs to inputs. There are two advantages to be gained from using a bi-directional pin for the 1-Wire signals: only one bit is needed for both input and output, and a high current (up to 25mA, the limit for an output pin) can be sourced to 1-Wire devices without external circuits. Some 1-Wire devices (for example, flash memory devices) require high current for part of their operation.

DAC

U204 is a dual 8-bit DAC. Values are written to the DAC using a synchronous serial port. The serial clock and data lines are connected to the SCLK (RC3) and SDATA (RC5) lines from the SSP port on the PIC. The chip select signals (U204 pin 1, CS\) is driven by the RD7 signals. RD7 should be set low to enable serial communications to the DAC.

Analog outputs from the DAC are available on connector J203 along with ground references. The signals are arranged on J203 so that reversing the connector will not cause any damage to the DAC or the device connected to J203. Reversing the connector will simply swap the analog output signals.

VARIATION FROM REQUIREMENTS

The only requirement that is not met by this design is the optional requirement for a ADXL202 Accelerometer. There was not enough space on the board to include this part.

Optional requirement 5, adding a second 1-Wire device and connector, was acheived by adding U203, U205, and J202.

$Date: 2008-10-21 19:17:34 $
$Revision: 1.7 $
$Source: /home/cvsroot/MEEPSTop/hardware/display.html,v $ Contact me by email: jedunmire at gmail.com